VE311 Electronic Circuit Homework 6
Due: Jul 9th 11:59a.m.
Note:
1) Please use A4 size paper or page.
2) Please clearly state out your final result for each question.
3) Please attach the screenshot of Pspice simulation result if necessary.
Peilin has become proficient in understanding the large-signal model of the MOSFET. However, to fully grasp the behavior of electronic circuits, Peilin needs to extend his knowl-edge to include the small-signal model. This is crucial for analyzing how the output signal reacts to variations in the input signal. This transition marks Peilin’s next challenge in the homework.
Question 1. Small Signal of MOSFET
Initially, Peilin needed to learn to draw small-signal circuits and understand the parameters of their components. The circuit shown below is a MOSFET cascode amplifier. The next challenge Xuyang hands Peilin is to draw the small signal model and derive Rout for the amplifier. Assume transistors M1 and M2 are in saturation and include rO in the calculation.
Question 2. Common-Source with Resistive Load
When dealing with weak signals, such as microphone amplifiers or signal conditioning circuits for other sensing devices, common-source MOSFET amplifiers are often used as the first stage of amplification because of the high voltage gain they can provide. In his final task, Peilin must optimize a common-source amplifier with a resistive load. Assume λ = 0 and γ = 0. For VDD = 5V , Vin = 0.9 V + small signal, RD = 15kΩ and Ldrawn = 2µm, find out the value Wdrawn to obtain a voltage gain |Av | > 10 and VOUT (the DC biasing voltage at the output) close to 2.5V as much as possible.
VTO : threshold voltage with zero VSB ( unit : V )
GAMMA : body effect coefficient ( unit : V 1/2 )
PHI : 2ΦF ( unit : V )
TOX : gate oxide thickness ( unit : m )
NSUB : substrate doping ( unit : cm−3 )
LD : source/drain side diffusion ( unit : m )
UO : channel mobility ( unit : cm2 /V/s )
LAMBDA : channel-length modulation coefficient ( unit : V −1 )
CJ : source/drain bottom-plate junction capacitance per unit area ( unit : F/m2 )
CJSW : source/drain sidewall junction capacitance per unit length ( unit : F/m )
PB : source / drain junction built-in potential ( unit : V )
MJ : exponent in CJ equation ( unitless )
MJSW : exponent in CJSW equation ( unitless )
CGDO: gate-drain overlap capacitance per unit width ( unit : F/m )
CGSO : gate-source overlap capacitance per unit width ( unit : F/m )
JS : source/drain leakage current per unit area ( unit A/m2 )
Vacuum permittivity (ϵo ) = 8.85×10−12 (F/m)
Silicon oxide dielectric constant (ϵr ) = 3.9
After days of intense focus, Peilin finally submitted his solutions for the small-signal MOS- FET models and the common-source amplifier. He had met all the challenges Xuyang had thrown at him, from understanding MOSFET biasing in Homework 5 to mastering the in- tricacies of small-signal analysis and amplifier optimization in Homework 6.
In a brief yet significant meeting, Xuyang reviewed Peilin’s work. “Excellent job, Peilin,” Xuyang said with a nod of approval. “Your understanding of MOSFET technology is im- pressive, and your solutions demonstrate both precision and creativity.”
Peilin felt a surge of pride. He had not only completed the tasks but had also deepened his understanding of crucial electronic concepts. More importantly, he had proven his value to Blue Tiger Electronics.
As Peilin left Xuyang’s office, he looked forward to the new challenges ahead. With a renewed sense of confidence, he knew he was ready to tackle whatever came next in his journey as an engineer at Blue Tiger Electronics.